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v2200

 
Qmax V2200 Desk Top ATE system is the best solution for ATE Labs. ATE V2200 system is designed as a Combination Board Tester capable of testing highly complex and dense PCBs employing various test techniques on a single platform. It can perform Board Level Functional Test through edge connectors of a PCB, and guided probe diagnostics utility to reliably repair Digital/Analog and Mixed Signal PCBs of various complexities for conventional PCBs. It can perform as In–Circuit Device / Cluster test by configuring Pin Drivers to High Current Pin Driver mode and interface to the UUT either through Clips / Probes or nail bed.

It has in-built 20MHz 12bit Analog Driver / sensors synchronized with digital drivers for covering analog / mixed signal devices. Integrated Boundary Scan Test controller (Up to 2 Chains) and software package can be used to test todays PCBs with high density / high pin count devices. Uses latest technology Boundary Scan hardware with RAM based drivers / sensors in synchronization with ATE digital and analog pin drivers. To effectively test CPU based boards without excluding the CPU from the test, the system offers optional Qmax patented Bus Cycle Signature System. In-Circuit Emulator Support for testing DSP based Board Function.

Parametric Measurement Units (PMU) enables testing of the DC parametric of device pins on the edge connector for input bias current, Fan out capacity and Tri-state leakage currents to further enhance fault coverage and avoid unwanted field returns. Optional AC Parametric Tests for propagation delay, rise / fall time and pulse width measurements. Both DC and AC parameters are read from the Device Library and hence loose devices can be tested for both functionality as well as DC and AC parameters as specified in their data sheet. This feature is extreamy useful in Stringent In-coming QC applications.

The capabilities can be further enhanced with optional IEEE instrumentation or PXI based Instrumentation and control through TestDirector 6 software. Analog Highways and relay matrix modules are used in routing the test pin to external measurement IEEE or PXI Instruments of user choice. Uses Virginia Panel Test adapter Interface for highly reliable Unit Under Test (UUT) Interface Panel provides up to 384 signal pins, 19 power (50A each) and 19 RF connectors. The ATE is interfaced to an external Host PC using a 32 bit, 33MHz PCI interface card or PCI Express. 

It is a modular design with upgrade options. The basic system comes with 128 Universal Channels programmable for High Current Pin Driver or 50 Ohms source impedance, 8 Flying channels 4 Analog channels and 5 fixed UUT power supplies. It can be easily upgraded to 160 or more Digital Channels with Programmable UUT power supplies, IEEE or PXI External Instrumentation, Bus Cycle Signature System, ICE and Integrated Boundary Scan Test.
Features
Maximum Digital test speed on the pin of DUT is up to 25 MHz and 10MHz Analog Testing 
  ( 25MHz Sampling Rate).
VHDL & Python TD Based Device Library for 31000+ Models.
Four 14 Bit RAM based Analog Channels switchable across all 256 Channels with wider range of source
  impedance selection.
Integrated Boundary Scan Test along with ATE pin electronics for Interconnect and functional Test of 
  Non Boundary Scan devices through virtual test pins.
Automatic Guided Probe Back Tracking for Fault Isolation up to node level.
User defined Error Log reporting. Failure analysis, statistics and datalog.
Fault Simulation for card Edge Test Program and Library Device Programs and optional Fault Dictionary.
256k X 6 RAM behind every Digital pin and 256K X 28 behind every analog pin.
Programmable Time base from 40ns to 167ms in steps of 10ns Integrated Boundary Scan Test along 
  with ATE pin electronics for Interconnect and functional Test of Non Boundary Scan devices through 
  virtual test pins.
In-Circuit Emulation Capabilities.
Integrated PXI Instruments for RF and extended tests.
External GPIB based Instrument integration.
Test access through Clips / Probes, bed of nail fixtures, edge connectors and JATG port.
4 Digital Highways and AC parametric measurements for measurement of Frequency, Pulse Width, 
  Propagation delay between signals and Rise / Fall time.
8 Analog highways of 30MHz band width for connecting terminals of external Instruments to any of 
  the 160 test pins.
User defined analog stimulus QSM VI with Auto Best Fit Curve Algorithm.
Edge Connector Functional Test and Guided Probe Back tracking. Optional Fault coverage report and
  Fault dictionary.
In-Circuit Test capability of Digital / Analog / Mixed Signal devices using Force Drive Pin Electronics.
Precision Measurement Units for enhanced fault coverage and reduced field returns.
DC Parametric Tests. – Measurement of Input Bias Current, Fan out and Tri-State leakage test.
Integrated PXI Instruments for RF and extended tests.
External GPIB based Instrument integration.
Test access through Clips / Probes, bed of nail fixtures, edge connectors and JATG port.
Test Program Migration form Different other Platform to Qmax System.
Test-Jig adopters for system self-test and auto analog calibration.
Four RF connectors direct from fixture to Instruments without switching.
Integrated VHDL Simulator as per IEEE standards
Paperless Repair Station.
Bus Cycle Signature system for CPU Based boards for Learn and Compare digital signatures without 
  having to write TPS.
Test Program Migration form Different other Platform to Qmax System.
VPC Mass Interconnect adapter with 16 bit fixture ID with Power / RF connectors and Test Signal pins.
5 Data formats for drive edge placement. NRZ, RZ, RO, RZ and SBC.
Automatic Fault Simulation in Simulator based Test programs.
Test-Jig adopters for system self-test and calibration.
Integrated VHDL Simulator as per IEEE standards.
Paperless Repair Station.