Key product
Digital I/O
ConnectorMolex™ Nano-Pitch I/O™

5.0 V Power

±5%, 50 mA maximum, nominal

Digital I/O Single-Ended Channels
Number of channels

8

Signal type

Single-ended

Voltage families

3.3 V, 2.5 V, 1.8 V, 1.5 V, 1.2 V

Input impedance

100 kΩ, nominal

Output impedance

50 Ω, nominal

Direction control

Per channel

Minimum required direction change latency

200 ns

Maximum output toggle rate

60 MHz with 100 μA load, nominal

Onboard DRAM
Memory size

4 GB (2 banks of 2 GB)

DRAM clock rate

1064 MHz

Physical bus width

32 bit

LabVIEW FPGA DRAM clock rate

267 MHz

LabVIEW FPGA DRAM bus width

256 bit per bank

Maximum theoretical data rate

17 GB/s (8.5 GB/s per bank)

Analog Output
General Characteristics
Number of channels

2, single-ended, simultaneously updated

Connector type

SMA

Output impedance

50 Ω

Output coupling

AC

Update rate
Internal Sample Clock, 2x interpolation

6.4 GS/s

External Sample Clock, 2x interpolation

6.4 GS/s

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